1. Field of the Invention
The present invention relates to a semiconductor device having Cu wiring mainly composed of Cu (copper).
2. Description of Related Art
Following increase in the scale of integration of a semiconductor device, further refinement of wiring has been required. In order to suppress increase in wiring resistance resulting from refinement of the wiring, it is under examination to apply Cu (copper) having higher conductivity to the material for the wiring, in place of conventionally employed Al (aluminum).
Since it is difficult to finely pattern Cu by dry etching or the like, Cu wiring is formed by the so-called damascene process. According to the damascene process, a fine wiring trench corresponding to a predetermined wiring pattern is first formed in an insulating film made of SiO2 (silicon oxide). A Cu film is formed in such a thickness as to fill up the wiring trench and cover the entire surface of the insulating film. Thereafter the Cu film is polished by CMP (Chemical Mechanical Polishing). This polishing of the Cu film is continued until parts of the Cu film outside the wiring trench are entirely removed and the surface of the insulating film outside the wiring trench is exposed. Thus, the Cu film remains only in the wiring trench, and a Cu wiring embedded in the wiring trench is obtained.
However, Cu has higher diffusibility into the insulating film as compared with Al. If the Cu wiring (the Cu film) is directly formed on the insulating film, therefore, Cu may diffuse into the insulating film to cause an interwiring short circuit or the like. Therefore, a barrier film must be formed between the insulating film and the Cu wiring, in order to prevent Cu from diffusing into the insulating film.
In relation to this barrier film, there has been proposed a method of forming a CuMn alloy film made of an alloy of Cu and Mn (manganese) on an insulating film provided with a wiring trench in advance of formation of a Cu film, and performing heat treatment after the formation of the Cu film, thereby diffusing Mn contained in the alloy film into the interface between the alloy film and the insulating film to form a barrier film made of MnxSiyOz (x, y and z: numbers greater than zero) on this interface.
Following refinement of the wiring, on the other hand, the interwiring distance is reduced, and hence the electric capacitance (interwiring capacitance) between adjacent wirings is disadvantageously increased. This problem can be solved by employing the so-called Low-k material (SiOC or SiOF, for example) having a small specific dielectric constant as the material for the insulating film.
However, an insulating film made of a Low-k material has a small film density due to a large number of holes (pores) present therein. When a CuMn alloy film is formed on this insulating film, therefore, the CuMn alloy disadvantageously easily infiltrates into the insulating film. Further, when a wiring trench is formed in the insulating film, the holes may be partially exposed, to result in forming recesses on the inner surface of the wiring trench. In addition, the insulating film made of the Low-k material has a smaller concentration of O (oxygen) as compared with an insulating film made of SiO2, and hence it is difficult to form a barrier film made of MnxSiyOz thereon.
In order to solve these problems, the thickness of the CuMn alloy film may be increased. If the thickness of the CuMn film is increased, however, Mn diffuses into the Cu wiring in excess of the quantity necessary for forming the MnxSiyOz barrier film, to increase the wiring resistance of the Cu wiring.